CoaXPress Camera Side IP core

This IP core is based on the industrial camera interface standard CoaXPress1.1, developed by Shanghai Mingbo Communication Technology Co., Ltd. The CoaXPress1.1 standard uses coaxial cables, each cable can transmit 12.5Gbps (actual rate 10G), and 4 cables in parallel can achieve a transmission performance of 50Gbps (actual rate 40G).

The cable transmission distance can reach 40~100 meters or more, and the camera and the PC for image reading and processing can be placed at a long distance, so the freedom of equipment installation can be improved.

In this IP core, the functions that require high-speed processing defined by the CoaXPress standard are implemented in hardware, and other low-speed but customized processing such as control packets are implemented by the firmware of the FPGA embedded processor. A balance between high flexibility and easy implementation is achieved.

Features

● Supports Stream packet sending, Control packet sending and receiving, Trigger receiving functions

● Using the Idle Word insertion function, it can be sent even without Frame buffer

● Utilize FPGA embedded serializer for transmission to reduce device size

● Minimum Footprint: Kintex-7 -- about 1000 slices per lane

● Link transmission speed can be dynamically adjusted within the range of 1.25Gbps~6.25Gbps

● Support 1 lane (effective throughput 5Gbps) ~ 4 lanes (effective throughput 20Gbps) configuration

Corresponds to FPGA

Xilinx®: Spartan®-6LXT, Kintex®-7, Virtex®-7, Artix®-7 and others

Altera®: Cyclone®IV, Cyclone®V, Arria®II,Arria®V, Stratix®IV, Stratix® V and others

 

Performance

 

● 12.5Gbps x 4lanes configuration

● Using Euresys FrameGrabber CoaxLink CXP-12

● 2048 x 2048 bits monochrome image continuous transmission

● 4898.4MB/s x 8bit = ~39.2Gbps performance

Evaluation Board

We provide evaluation and development based on KC705, ZCU102, etc. Please feel free to contact us for details.

Model, License Type

The IP is licensed under Project-Free Site-License instead of Project-Base-License commonly used in FPGA. This form of licensing is also very beneficial for customers who develop small batches and multiple varieties.

Standard functions: Link-Speed ​​1.25Gbps~12.5Gbps (dynamically adjustable. Max. 3.12Gbps if implemented by Spartan®-6LXT), Control Packet transceiver function, Stream send function (rectangular image, arbitrary image format), Trigger transceiver function, reference design including MicroBlazeTM CoaXpress 2.0 scheduled to support CXP-10 and CXP-12 can also be supported, welcome to inquire.

Annual Site-License, Netlist provided

Fixed Device Family

6 months technical support

DC-CXP-L1-NET-XXX

DC-CXP-L4-NET-XXX

● Fixed Device-Family, XXX indicates the Device-Family model

Example: DC-CXP-L1-NET-K7 for Kintex-7 version. Please contact us for details.

For the same Device-Family, any size of device can be used

DC-CXP-L4-SRC 4-Lanes configuration

● Does not support the sale of 1-Lane and 2-Lanes configurations

● All devices that can be supported at the time of contract signing are supported

DC-CXP-SUPPORT-1Y 1-year technical support/can be updated

Other customized needs are also supported

Consult

Shanghai Mingbo Communication Technology Co., Ltd.
E-mail :sales@bwave.cc
Contact: Mr. Zhang
Mobile :13913195120
Each brand name and product name is a trademark of each company

 

GigE Vision IP Core

Functional Overview

This IP core is based on the industrial camera interface standard  GigE-Vision®2.0, and is developed by Shanghai Mingbo Communication Technology Co., Ltd.

In this IP core, the image transmission function required for high-speed transmission is implemented by hardware, and other low-speed processing is implemented by the firmware (Firmware) of the FPGA embedded processor.

The firmware library is provided in the form of C source code, and functions can be changed or added as needed.

This IP supports the PTP/IEEE1588 standard adopted by GigE-Vision®2.0. This function does not require the support of an external special Ethernet PHY/MAC. This IP contains the hardware/firmware library for PTP, and the PTP function can be implemented based on a cheap FPGA or Ethernet PHY.

Features

● GVCP function: In addition to the main required functions, it also supports PACKETRESEND, PENDING, ACTION, and EVENT

● GVSP function: In addition to the main required functions and the 100/1000BASE function that supports Chunk Data, it can also support 2.5G/5G/10G/25GBASE according to requirements

● Supports PTP/IEEE1588. The firmware supports not only Slave mode, but also simple Master mode. In our company's test environment, the time offset does not exceed 50ns even under high network load conditions.

● Minimum Footprint: Cyclone®VE—about 7500ALMs; Artix®-7—about 7000Slices; (including processor, Ethernet MAC, Frame Buffer, etc.)

● Provide reference design for GigE Vision® camera action

● The reference design has passed all the Validation Tools required for GigE Vision® certification Test

For FPGA

Xilinx®: 7-Series, UltraScale,UltraScale+Series and others 

Altera®: Cyclone®V, Arria®V, Stratix®IV, Stratix® and others

Firmware composition

performance

 

● 10GBASE operation

● Continuous shooting in 2048*2048 mono Packed format

● Performance 9909Mbps→ Efficiency 99.8%

 

PTP precision

 

Measure PTP error during image transmission of 4000 x 3000 x 9.5fps (TaskManager shows 95% bandwidth utilization)

Use the simple Master function of this IP and the PTP-compatible Ethernet Switch to continuously measure the PPS output deviation for 24 hours

Model, License form

This IP is licensed using Project-Free Site-License, rather than Project-Base-License commonly used in FPGAs. This form of licensing is also very beneficial for customers who develop small batches and multiple varieties.

Annual Site-License, providing 6-month fixed technical support for Netlist Device Family

100/1000/2.5GBASE version DC-GEV-1G-TX-NET-XXX

10GBASE version DC-GEV-10G-TX-NET-XXX

style="line-height:2;">25GBASE version DC-GEV-25G-TX-NET-XXX

● Device-Family is fixed, XXX indicates the Device-Family model

Example: DC-GEV-1G-TX-NET-A7 for Artix-7 version. Please contact us for details. If the same Device-Family is used, devices of any size can be used.

100/1000/2.5G/10GBASE version DC-GEV-10G-TX-SRC

25GBASE version DC-GEV-25G-TX-SRC

● All devices that can be supported at the time of signing the contract are supported.

 

USB3 Vision Library

Functional Overview

Follow USB3Vision® Firmware library that complies with the V1.01 standard industrial camera interface.

USB3 Vision® firmware library produced by Shanghai Mingbo Communication Technology Co., Ltd., manufactured in Xilinx® FPGA ZYNQ Ultrascale+

Runs on the firmware by using the built-in USB3.0 hard-core module of the device, without consuming the structure of the FPGA.

Without the additional cost of adding FPGA and external devices for USB3.0, it can realize high-speed transmission of stereo cameras and AI images to the PC side

The results of recognition processing, etc.

Cortex-R5 can be used as the processor to run the firmware, without consuming the resources of the Cortex-A53 required for image processing.

Features

● Image data can be sent to multiple components with different formats at once.

● Chunk Data is supported. This allows information such as component identification and image recognition results to be attached to image data.

● XML data can be embedded in code and written to an SD card.

● The memory required for operation is approximately 400kByte, and in addition, an area for the frame buffer is required.

● Actually the reference code for USB3Vision® camera operation

● Validation Suite test and USB3 Command Verifier Chapter 9 required for USB3Vision® certification

Corresponding to FPGA

Xilinx®: ZYNQ UltraScale+ Series

Performance

 

Connect to the USB3.1Gen1 port of the Intel®Z390 chipset, and continuously record in 2560×2048 bit mono format, and the performance is 2680Mbps using eBus Player

Evaluation board

Can be used for evaluation and development using Ultra96, ZCU104, etc. Please call or write to confirm for details.

Model, License form

This IP is licensed using Project-Free Site-License, rather than Project-Base-License commonly used in FPGAs. This form of licensing is also very beneficial for customers who develop small batches of multiple products.

Currently, the authorization is permanent authorization, and permanent authorization is divided into the following two types:

1. Permanent authorization for code

2. Permanent authorization for binary encoding

● Other materials provided are reference design, library code and reference documents

● 6 months technical support

Model: DC-U3V-TX-SRC-ZUSP

*All devices supported at this time

DC-CXP-SUPPORT-1Y 1 year technical support/can be updated, other customized requirements are also provided.